1. Field of the Invention
Embodiments of the invention relate to a method of fabricating a semiconductor device. In particular, embodiments of the invention relate to a method of fabricating a semiconductor device comprising forming an etching mask.
This application claims priority to Korean Patent Application No. 10-2005-0060796, filed on Jul. 6, 2005, the subject matter of which is hereby incorporated by reference in its entirety.
2. Description of the Related Art
As semiconductor devices have become more highly integrated, the distances separating elements of a semiconductor device have become increasingly small. These elements are generally formed through the use of a micro-pattern. The micro-pattern is used to variously etch thin material layers and is formed using photolithography techniques. Thus, the precision with which photolithography techniques are applied is an important factor in the resulting quality of the micro-pattern.
In conventional photolithography techniques, a pattern for use as an etching mask, for example, is exposed on a photosensitive material layer using KrF laser projecting light at a wavelength of 248 nm or ArF laser projecting light at a wavelength of 193 nm. Following exposure to light at these respective wavelengths the photosensitive material layer is developed. Once the photosensitive material layer is developed, a subsequently applied etching process is used to form the desired micro-pattern on a lower layer (i.e., a layer formed below the resist pattern) as a result of an etch selectivity between the resist pattern and the lower layer.
However, as semiconductor devices become more highly integrated, the number and complexity of the constituent fabrication processes increases. Also, as the line width and similar separation distances between elements on contemporary semiconductor devices decreases, the usefulness of conventional photolithography equipment and techniques becomes increasingly strained. This is particularly true for the lasers conventionally used in the development of micro-patterns. The performance limitations currently being experienced with regard to conventional equipment are a result of the optical characteristics for the constituent light sources and/or the associated chemical characteristics of certain materials commonly used in conventional photolithography processes.
To overcome some of these limitations, a silicon nitride layer or a polysilicon layer has been formed on an etching target layer and used as an etching mask to form a micro-pattern. A hard material layer other than a photosensitive material used as an etching mask is commonly referred to as a hard mask (or hard mask pattern).
As the design rule for semiconductor fabrication processes falls below 100 nm, many of these processes require increasingly small critical dimensions (CDs). Examples of such processes include those related to the formation of a recess channel array transistor (RCAT), a self aligned contact plug (SAC), a storage node contact plug, a DRAM capacitor, and a contact plug in a flash device. In addition, small CDs are typically obtained using a photolithography process and an associated etching process. In typical processes related to the fabrication of semiconductor devices such as DRAMs or flash devices, a design rule of about 90 nm is used for mass production, while a design rule of 50 nm is currently being researched. One of the most important factors in developing such devices having small design rules is the patterning of small CDs using photolithography and etching processes. In particular, the photolithography process should be accomplished first so that the following etching process may be evaluated. However, the development of a scanner, which is a piece of exposure equipment, is lagging behind the reduction of the design rule in a semiconductor device.
For example, in a process for forming an RCAT of a DRAM, where the CD of a space formed in the process (i.e., the width of a trench in which a buried gate will be formed) should be less than 40 nm, a plurality of bridges are generated due to the scanner's resolution limit. In addition, in a process for forming an SAC, contact holes are not correctly formed (i.e., are not open) due to a bridge caused by scum. In a process for forming a contact plug in a flash device, when the CD of a space (i.e., the width of a contact hole where the contact plug will be formed) should be less than 60 nm, scum often causes contact holes to be formed incorrectly (i.e., causes non-open defects). Thus, alternative approaches such as a sidewall patterning technique or a double exposure technique have been introduced for patterning small CDs. However, these alternate fabrication techniques are expensive, complicated, and more time consuming.